A 6-bit Fully Segmented Current Mode DAC in RIT 2μm Process

Submitted by imre on Wed, 05/19/2004 - 12:44.

This paper describes a high relatively high performance DAC designed in the RIT 2um process. The DAC is a traditional fully segmented architecture. It has 6 bits of resolution and operates at up to 20MHz at an operating voltage of 5V. Please find the paper attached below.

Attachment	Size
DAC_term_paper.pdf	521.74 KB

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A 6-bit Fully Segmented Current Mode DAC in RIT 2μm Process

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